Desenvolvimento de receptor de wake-up de tempo discreto para CMOS 180nm

Abstract

This work proposes a discrete-time (DT) wake-up receiver (WUR) as a solution to reduce the power consumption of Internet of Things (IoT) devices. The core of the proposed circuit is the discrete-time mixer, formed by a switched capacitors structure, that translates and filters the on-off keying (OOK) modulation radiofrequency (RF) signal. Other blocks that compose the circuit are: an integrated matching network, frequency dividers, a baseband amplifier and a voltage reference. This research conduct the design and sizing of the components, simulates the circuit and executes the tape-out of the receiver in TSMC180NM technology. The extracted layout simulations indicate a sensitivity of -52 dBm and a consumed power of 29.33 µW, with the circuit being operated at 900 MHz, with 100 kbps and 1.2 V. The research also measured the manufactured chip on its peak performance operation point, at 1.15 GHz with 50 kbps and 1.1 V, the receiver presents a sensitivity of -17 dBm and a consumed power of 46.3 µW. It is postulated that the chip’s poor result is due to an insufficient gain of the baseband amplifier. Improvements were implemented to the circuit on a second TSMC180NM tape-out, which until the moment this work had been written has not yet been delivered. For this second chip, the extracted layout simulation shows a sensitivity of -70 dBm and power consumption of 33.3 µW. The present work brought important contributions to this line of research as it validates, through measurements on the chip, the proof of concept of the use of discrete-time receivers as wake-up receivers