Analisador de Non-Volatile Memory Express baseado em Field-Programmable Gate Array - Linden, Vinícius Gabriel (Universidade do Vale do Rio dos Sinos, 2020)
The usage and development intensification of Solid-State Drive (SSD), in varying applications, open up the optimization possibilities for the legacy techniques acquired from the outdated Hard Disk Drives (HDD). For this reason, a committee made of the leading flash memory technology manufacturers has put forward a new standard for the communication protocol, named Non-Volatile Memory Express (NVMe). This protocol was created with the end goal of suppressing the performance penalties imposed by the software layer, leaving the hardware more standardized with a high degree of parallelism and performance. Due to industrial secret, manufacturers do not share the protocol implementation’s details. This makes recent literary resources scarce to the academia, with the most relevant papers published by the industry itself. All of this contributes to turn the SSD development out of reach for the third-party researchers, limiting the academic contribution. For this reason, this project presented a solution for enabling the research of both the NVMe protocol and SSD’s characteristics, making a flexible platform for this development: a benefit for both the industry and academia. By employing programmable logic in the project’s implementation, greater flexibility and versatility was allowed. The current State of the Art presents one with no research that put forward such a platform exclusively aimed at SSD development and protocol analysis. This work focuses in the implementation and testing of real time logic in commercial hardware. Solutions for acquiring NVMe protocol data and enabling to memory access optimization were presented, in form of three different systems: a field capture and storage; a NVMe command counter by function, capable of restricting its count by numeric fields; and a NVMe switch, which decides where to send the commands based on their own content. Command count and captured fields are visible through an external interface and configurations are introduced at runtime, through the same interface. It is believed that these systems fill the gap between the new guidelines and access availability to research — not only for the main manufacturers, but most importantly for academia.
Keywords: Tecnologia flash; Flash technology; Solid-state drive; Field-programmable gate array; Edge computing; ACCNPQ::Engenharias::Engenharia Elétrica