Development of an artificial neural network architecture using programmable logic - Cottens, Pablo Eduardo Pereira de Araujo (Universidade do Vale do Rio dos Sinos, 2016)
Currently, modern Artificial Neural Networks (ANN), according to their complexity, require a workstation for processing all their input data. This type of processing architecture requires that the field device is located somewhere in the vicintity of a workstation, in case real-time processing is required, or that the field device at hand will have the sole task of collecting data for future processing, when field data is required. This project creates a generic neuron architecture in programmabl logic, where Artifical Neural Networks can use the parallel nature of FPGAs to execute applications in a fast manner, albeit not using the same resolution for its otputs. This work shows that the utilization of programmable logic for the implementation of low bit resolution ANNs is not only viable, but the neural network, due to its parallel nature, benefits greatly from the hardware implementation, giving fast and accurate results.
Keywords: FPGA; SoC; Redes neurais artificiais; Neuronio em hardware; Artificial neural network; Hardware neuron; ACCNPQ::Engenharias::Engenharia Elétrica